2014-01-17
SPI test - spi080.h
// ***********************************************************************
// spi080.h 2013dec10hkt1027
// ***********************************************************************
#include "gpio050.h"
#include "led050.h"
#include "lpc11xx_ssp.h"
#include "semihosting.h"
#include "stdio.h"
#include "config050.h"
#ifndef SPI_HEADER_SEEN
#define SPI_HEADER_SEEN
// *** SPI #defines ***
#define MAX_SPI_CHANNEL_NUMBER 2
#define MAX_SPI_SLAVE_SELECT_NUMBER 9
#define SPI_CHANNEL_TOTAL 2
#define SPI_SLAVE_SELECT_TOTAL 9
#define SPI_CHANNEL_0 0
#define SPI_CHANNEL_1 1
#define SLAVE_SELECT_0 0
#define SLAVE_SELECT_1 1
#define SLAVE_SELECT_2 2
#define SLAVE_SELECT_3 3
#define SLAVE_SELECT_4 4
#define SLAVE_SELECT_5 5
#define SLAVE_SELECT_6 6
#define SLAVE_SELECT_7 8
#define SLAVE_SELECT_8 8
typedef int slaveSelectPortPinArray[2];
typedef slaveSelectPortPinArray *slaveSelectPortPinArrayPointerArray[SPI_SLAVE_SELECT_TOTAL];
typedef slaveSelectPortPinArrayPointerArray *slaveSelectPortPinArrayPointerArrayPointerArray[SPI_CHANNEL_TOTAL];
slaveSelectPortPinArray SlaveSelectPortPinArray00 = {PORT0, PIN2};
slaveSelectPortPinArray SlaveSelectPortPinArray01 = {PORT3, PIN0};
slaveSelectPortPinArray SlaveSelectPortPinArray02 = {PORT3, PIN1};
slaveSelectPortPinArray SlaveSelectPortPinArray03 = {PORT3, PIN2};
slaveSelectPortPinArray SlaveSelectPortPinArray04 = {PORT3, PIN3};
slaveSelectPortPinArray SlaveSelectPortPinArray05 = {PORT2, PIN6};
slaveSelectPortPinArray SlaveSelectPortPinArray06 = {PORT2, PIN7};
slaveSelectPortPinArray SlaveSelectPortPinArray07 = {PORT2, PIN8};
slaveSelectPortPinArray SlaveSelectPortPinArray08 = {PORT2, PIN9};
slaveSelectPortPinArray SlaveSelectPortPinArray10 = {PORT2, PIN0};
slaveSelectPortPinArray SlaveSelectPortPinArray11 = {PORT3, PIN0};
slaveSelectPortPinArray SlaveSelectPortPinArray12 = {PORT3, PIN1};
slaveSelectPortPinArray SlaveSelectPortPinArray13 = {PORT3, PIN2};
slaveSelectPortPinArray SlaveSelectPortPinArray14 = {PORT3, PIN3};
slaveSelectPortPinArray SlaveSelectPortPinArray15 = {PORT2, PIN6};
slaveSelectPortPinArray SlaveSelectPortPinArray16 = {PORT2, PIN7};
slaveSelectPortPinArray SlaveSelectPortPinArray17 = {PORT2, PIN8};
slaveSelectPortPinArray SlaveSelectPortPinArray18 = {PORT2, PIN9};
slaveSelectPortPinArrayPointerArray WuyinsSlaveSelectPortPinArrayPointerArraySp0V095[SPI_SLAVE_SELECT_TOTAL] = \
{&SlaveSelectPortPinArray00, &SlaveSelectPortPinArray01, &SlaveSelectPortPinArray02, \
&SlaveSelectPortPinArray03, &SlaveSelectPortPinArray04, &SlaveSelectPortPinArray05, \
&SlaveSelectPortPinArray06, &SlaveSelectPortPinArray07, &SlaveSelectPortPinArray08};
slaveSelectPortPinArrayPointerArray WuyinsSlaveSelectPortPinArrayPointerArraySp1V095[SPI_SLAVE_SELECT_TOTAL] = \
{&SlaveSelectPortPinArray10, &SlaveSelectPortPinArray11, &SlaveSelectPortPinArray12, \
&SlaveSelectPortPinArray13, &SlaveSelectPortPinArray14, &SlaveSelectPortPinArray15, \
&SlaveSelectPortPinArray16, &SlaveSelectPortPinArray17, &SlaveSelectPortPinArray18};
slaveSelectPortPinArrayPointerArrayPointerArray \
WuyinsSlaveSelectPortPinArrayPointerArrayPointerArrayV095[SPI_CHANNEL_TOTAL] = \
{&WuyinsSlaveSelectPortPinArrayPointerArraySp0V095, \
&WuyinsSlaveSelectPortPinArrayPointerArraySp1V095};
slaveSelectPortPinArrayPointerArray SlaveSelectPortPinArrayPointerArrayWuyinsSpi0 = \
{
&SlaveSelectPortPinArray00, \
&SlaveSelectPortPinArray01, \
&SlaveSelectPortPinArray02, \
&SlaveSelectPortPinArray03, \
&SlaveSelectPortPinArray04, \
&SlaveSelectPortPinArray05, \
&SlaveSelectPortPinArray06, \
&SlaveSelectPortPinArray07, \
&SlaveSelectPortPinArray08
};
slaveSelectPortPinArrayPointerArray SlaveSelectPortPinArrayPointerArrayWuyinsSpi1 = \
{
&SlaveSelectPortPinArray10, \
&SlaveSelectPortPinArray11, \
&SlaveSelectPortPinArray12, \
&SlaveSelectPortPinArray13, \
&SlaveSelectPortPinArray14, \
&SlaveSelectPortPinArray15, \
&SlaveSelectPortPinArray16, \
&SlaveSelectPortPinArray17, \
&SlaveSelectPortPinArray18
};
slaveSelectPortPinArrayPointerArrayPointerArray SlaveSelectPortPinArrayPointerArrayPointerArrayWuyinsSpi = \
{
&SlaveSelectPortPinArrayPointerArrayWuyinsSpi0, \
&SlaveSelectPortPinArrayPointerArrayWuyinsSpi1
};
// *** SPI PortPinArray assignment ***
portPinArray PortPinArraySsel0 = {PORT0, PIN2};
portPinArray PortPinArraySsel1 = {PORT2, PIN0};
portPinArray PortPinArraySsel00 = {PORT0, PIN2};
portPinArray PortPinArraySsel01 = {PORT3, PIN0};
portPinArray PortPinArraySsel02 = {PORT3, PIN1};
portPinArray PortPinArraySsel03 = {PORT3, PIN2};
portPinArray PortPinArraySsel04 = {PORT3, PIN3};
portPinArray PortPinArraySsel05 = {PORT2, PIN6};
portPinArray PortPinArraySsel06 = {PORT2, PIN7};
portPinArray PortPinArraySsel07 = {PORT2, PIN8};
portPinArray PortPinArraySsel08 = {PORT2, PIN9};
portPinArray PortPinArraySsel10 = {PORT2, PIN0};
portPinArray PortPinArraySsel11 = {PORT3, PIN0};
portPinArray PortPinArraySsel12 = {PORT3, PIN1};
portPinArray PortPinArraySsel13 = {PORT3, PIN2};
portPinArray PortPinArraySsel14 = {PORT3, PIN3};
portPinArray PortPinArraySsel15 = {PORT2, PIN6};
portPinArray PortPinArraySsel16 = {PORT2, PIN7};
portPinArray PortPinArraySsel17 = {PORT2, PIN8};
portPinArray PortPinArraySsel18 = {PORT2, PIN9};
portPinArray *Olimex2SlaveSelectPortPinArrayPointerArray0[] = {&PortPinArraySsel00, \
&PortPinArraySsel01, &PortPinArraySsel02, &PortPinArraySsel03, \
&PortPinArraySsel04, &PortPinArraySsel05, &PortPinArraySsel06};
portPinArray *Olimex2SlaveSelectPortPinArrayPointerArray1[] = {&PortPinArraySsel10, \
&PortPinArraySsel11, &PortPinArraySsel12, &PortPinArraySsel13, \
&PortPinArraySsel14, &PortPinArraySsel15, &PortPinArraySsel16};
portPinArray *Olimex20SlaveSelectPortPinArrayPointerArrayArray[2][7] = \
{&PortPinArraySsel00, &PortPinArraySsel01, &PortPinArraySsel02, \
&PortPinArraySsel03, &PortPinArraySsel04, &PortPinArraySsel05, \
&PortPinArraySsel06, \
&PortPinArraySsel10, &PortPinArraySsel11, &PortPinArraySsel12, \
&PortPinArraySsel13, &PortPinArraySsel14, &PortPinArraySsel15, \
&PortPinArraySsel16};
portPinArray *Olimex21SlaveSelectPortPinArrayPointerArrayArray[2][7] = \
{Olimex2SlaveSelectPortPinArrayPointerArray0, \
Olimex2SlaveSelectPortPinArrayPointerArray1};
portPinArray *WuyinsSpi0SselPortPinArrayPointerArray[] = {&PortPinArraySsel00, \
&PortPinArraySsel01, &PortPinArraySsel02, &PortPinArraySsel03, \
&PortPinArraySsel04, &PortPinArraySsel05, &PortPinArraySsel06};
portPinArray *WuyinsSpi1SselPortPinArrayPointerArray[] = {&PortPinArraySsel10, \
&PortPinArraySsel11, &PortPinArraySsel12, &PortPinArraySsel13, \
&PortPinArraySsel14, &PortPinArraySsel15, &PortPinArraySsel16};
portPinArray *WuyinsSpi0SselPortPinArrayPointerArrayV092[] = {&PortPinArraySsel00, \
&PortPinArraySsel01, &PortPinArraySsel02, &PortPinArraySsel03, \
&PortPinArraySsel04, &PortPinArraySsel05, &PortPinArraySsel06, \
&PortPinArraySsel07, &PortPinArraySsel08};
portPinArray *WuyinsSpi1SselPortPinArrayPointerArrayV092[] = {&PortPinArraySsel10, \
&PortPinArraySsel11, &PortPinArraySsel12, &PortPinArraySsel13, \
&PortPinArraySsel14, &PortPinArraySsel15, &PortPinArraySsel16, \
&PortPinArraySsel17, &PortPinArraySsel18};
slaveSelectPortPinArrayPointerArray *WuyinsSpi1SselPortPinArrayPointerArrayArrayV094[] = \
{&WuyinsSpi0SselPortPinArrayPointerArrayV092, \
&WuyinsSpi0SselPortPinArrayPointerArrayV092};
// typedef int portPinArray[2];
// typedef portPinArray *portPinArrayPointerArray[MAX_DEVICE_NUMBER];
// typedef portPinArray *slaveSelectPortPinArrayPointerArray[MAX_SLAVE_SELECT_NUMBER];
slaveSelectPortPinArrayPointerArray *WuyinsSpi0SselPortPinArrayPointerArrayV095[] = \
{&PortPinArraySsel00, &PortPinArraySsel01, &PortPinArraySsel02, \
&PortPinArraySsel03, &PortPinArraySsel04, &PortPinArraySsel05, \
&PortPinArraySsel06, &PortPinArraySsel07, &PortPinArraySsel08};
slaveSelectPortPinArrayPointerArray *WuyinsSpi1SselPortPinArrayPointerArrayV095[] = \
{&PortPinArraySsel10, &PortPinArraySsel11, &PortPinArraySsel12, \
&PortPinArraySsel13, &PortPinArraySsel14, &PortPinArraySsel15, \
&PortPinArraySsel16, &PortPinArraySsel17, &PortPinArraySsel18};
slaveSelectPortPinArrayPointerArray *WuyinsSpiSselPortPinArrayPointerArrayArrayV095[] = \
{&WuyinsSpi0SselPortPinArrayPointerArrayV092, \
&WuyinsSpi0SselPortPinArrayPointerArrayV092};
// ***************************************************************************
// SPI Functions
// ***************************************************************************
void setupSpiSlaveSelectPortV0909(uint8_t mcuBoardNumber, uint8_t spiChannelNumber, uint8_t slaveSelectNumber)
{
initializeOutputPin01HighV093((*SlaveSelectPortPinArrayPointerArrayPointerArrayWuyinsSpi[spiChannelNumber])[slaveSelectNumber]);
}
void spiTransmit0909(uint8_t spiChannelNumber, uint8_t slaveSelectNumber, \
portPinArray *portPinArrayPointer, \
SSP_DATA_SETUP_Type xferConfig)
{
setGpioDataPinLow01(*portPinArrayPointer);
if (spiChannelNumber == 0)
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
else // (spiChannelNumber == 1)
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);
setGpioDataPinHigh01(*portPinArrayPointer);
}
...
void setupOneSpiChannel080(uint8_t spiChannelNumber)
{
// printf("\nSPI Channel number = %01d", spiChannelNumber);
if (spiChannelNumber == 0)
{
// Enable SSP0 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP0, ENABLE);
// Reset SSP0 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, DISABLE);
SYSCON_SetSPI0ClockDiv(10);
// Assign GPIO pins for SPI
SSP_SSP0PinsInit(SCK0_PIO0_6, DISABLE); // Select P06, BUT disable
// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);
}
else // (if spiChannelNumber == 1)
{
// Enable SSP1 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP1, ENABLE);
// Reset SSP1 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, DISABLE);
SYSCON_SetSPI1ClockDiv(10);
// No need to assign GPIO pins for SPI1, just disable
SSP_SSP1PinsInit(DISABLE); // disable SSEL
// Note: A bug!!! in Coocox lpc11xx_iocon.c v1.0 26Jan2010
// IOCON_SetPinFunc(IOCON_PIO2_2, PIO2_2_FUN_MISO1);
// IOCON_SetPinFunc(IOCON_PIO2_3, PIO2_3_FUN_PIO_MOSI1);
// IOCON_SetPinFunc(IOCON_PIO2_1, PIO2_1_FUN_SCK1);
// if(useSSEL == ENABLE) {
// IOCON_SetPinFunc(IOCON_PIO2_0, PIO2_0_FUN_SSEL1);
// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP1, &SSP_ConfigStruct);
// Enable SSP1 peripheral
SSP_Cmd(LPC_SSP1, ENABLE);
}
}
...
// ***************************************************************************
// End
// ***************************************************************************
.END
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