2013-11-09
spi050.h refactoring notes
// ***********************************************************************
// spi050.h 2013oct26hk1611
// ***********************************************************************
#include "gpio050.h"
#include "led050.h"
#include "lpc11xx_ssp.h"
#include "semihosting.h"
#include "stdio.h"
#include "config050.h"
#ifndef SPI_HEADER_SEEN
#define SPI_HEADER_SEEN
// *** SPI Functions ***
#define SPI_CHANNEL_0 0
#define SPI_CHANNEL_1 1
// *** version 060 ***
// ***************************************************************************
// Function - Setup SPI channel and slave select GPIO port
// Date - 2013nov09
// Notes - 1. Port P06 also selected as default, BUT DISABLED!!!
// 2. There is a bug in lpc11xx_iocon.c v1.0
// 3. SlaveSelect GPIO port is initialized to output Low
// 4. portPinArray PortPinArraySsel0 = {PORT0, PIN2}; // SSEL0
// portPinArray PortPinArraySsel1 = {PORT2, PIN0}; // SSEL1
// ***************************************************************************
void spiSetup060(uint8_t spiChannelNumber, portPinArray slaveSelectPortPinArray)
{
if (spiChannelNumber == 0)
{
// Enable SSP0 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP0, ENABLE);
// Reset SSP0 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, DISABLE);
SYSCON_SetSPI0ClockDiv(10);
// Assign GPIO pins for SPI
SSP_SSP0PinsInit(SCK0_PIO0_6, DISABLE); // Select P06, BUT disable
// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);
// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);
}
else // (if spiChannelNumber == 1)
{
// Enable SSP1 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP1, ENABLE);
// Reset SSP1 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, DISABLE);
SYSCON_SetSPI1ClockDiv(10);
// No need to assign GPIO pins for SPI1, just disable
SSP_SSP1PinsInit(DISABLE); // disable SSEL
// Note: A bug in Coocox lpc11xx_iocon.c v1.0 26Jan2010
// IOCON_SetPinFunc(IOCON_PIO2_2, PIO2_2_FUN_MISO1);
// IOCON_SetPinFunc(IOCON_PIO2_3, PIO2_3_FUN_PIO_MOSI1);
// IOCON_SetPinFunc(IOCON_PIO2_1, PIO2_1_FUN_SCK1);
// if(useSSEL == ENABLE) {
// IOCON_SetPinFunc(IOCON_PIO2_0, PIO2_0_FUN_SSEL1);
// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP1, &SSP_ConfigStruct);
// Enable SSP1 peripheral
SSP_Cmd(LPC_SSP1, ENABLE);
}
// Setup Ssel0
setupGpioPinOutputLow050(slaveSelectPortPinArray);
}
// ***************************************************************************
// Function - SPI transmit
// Date - 2013nov09
// Notes - 1. SlaveSlave Port P06 selected as default, BUT DISABLED!!!
// 2. SSEL0 default is P02, SSEL1 default is P20
// ***************************************************************************
void spiTransmit060(uint8_t spiChannelNumber, portPinArray slaveSelectPortPinArray, \
SSP_DATA_SETUP_Type xferConfig)
{
setGpioDataPinLow01(slaveSelectPortPinArray);
if (spiChannelNumber == 0)
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
else // (spiChannelNumber == 1)
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);
setGpioDataPinHigh01(slaveSelectPortPinArray);
}
// .END
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