2013-11-10

spi050.h refactoring notes


// ***********************************************************************
// spi050.h 2013nov10hkt0930
// ***********************************************************************

#include "gpio050.h"
#include "led050.h"
#include "lpc11xx_ssp.h"
#include "semihosting.h"
#include "stdio.h"
#include "config050.h"

#ifndef SPI_HEADER_SEEN
#define SPI_HEADER_SEEN

// *** SPI Functions ***

#define SPI_CHANNEL_0 0
#define SPI_CHANNEL_1 1

#define SLAVE_SELECT_0 0
#define SLAVE_SELECT_1 1

// *** version 060 ***

// ***************************************************************************
// Function - Setup SPI channel and slave select GPIO port
// Date     - 2013nov10
// Notes    - 1. Port P06 selected as default, BUT DISABLED!!!
//            2. There is a bug in lpc11xx_iocon.c v1.0
//            3. SlaveSelect GPIO port is initialized to output Low
//            4. portPinArray PortPinArraySsel0 = {PORT0, PIN2}; // SSEL0
//               portPinArray PortPinArraySsel1 = {PORT2, PIN0}; // SSEL1
// ***************************************************************************
void spiSetup060(uint8_t spiChannelNumber, uint8_t slaveSelectNumber)
{
if (spiChannelNumber == 0)
{
// Enable SSP0 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP0, ENABLE);

// Reset SSP0 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, DISABLE);
SYSCON_SetSPI0ClockDiv(10);

// Assign GPIO pins for SPI
SSP_SSP0PinsInit(SCK0_PIO0_6, DISABLE); // Select P06, BUT disable

// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);

// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);
}
else // (if spiChannelNumber == 1)
{
// Enable SSP1 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP1, ENABLE);

// Reset SSP1 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, DISABLE);
SYSCON_SetSPI1ClockDiv(10);

// No need to assign GPIO pins for SPI1, just disable
SSP_SSP1PinsInit(DISABLE); // disable SSEL

// Note: A bug in Coocox lpc11xx_iocon.c v1.0 26Jan2010
// IOCON_SetPinFunc(IOCON_PIO2_2, PIO2_2_FUN_MISO1);
// IOCON_SetPinFunc(IOCON_PIO2_3, PIO2_3_FUN_PIO_MOSI1);
// IOCON_SetPinFunc(IOCON_PIO2_1, PIO2_1_FUN_SCK1);
// if(useSSEL == ENABLE) {
        //    IOCON_SetPinFunc(IOCON_PIO2_0, PIO2_0_FUN_SSEL1);

// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP1, &SSP_ConfigStruct);

// Enable SSP1 peripheral
SSP_Cmd(LPC_SSP1, ENABLE);
}

// *** Setup Ssel0 ***

// *** 1. This is OK ***
/*
setupGpioPinOutputLow050(PortPinArraySsel00);
    */

// *** 2. Also OK ***
/*
portPinArray *slaveSelectPortPinArray;
slaveSelectPortPinArray = &(PortPinArraySsel00);
setupGpioPinOutputLow050(*slaveSelectPortPinArray);
*/

// *** 3. NOT OK ***
// setupGpioPinOutputLow050(SlaveSelectPortPinArrayPointerArrayArray[0][0]);

// *** 4. This is OK ***
// setupGpioPinOutputLow050(*SlaveSelectPortPinArrayPointerArrayArray[0][0]);

// *** 5. NOT OK ***
// portPinArray *slaveSelectPortPinArrayPointer;
// slaveSelectPortPinArrayPointer = SlaveSelectPortPinArrayPointerArrayArray[spiChannelNumber][slaveSelectNumber];
// setupGpioPinOutputLow050(slaveSelectPortPinArrayPointer);

// *** 6. This is OK ***
setupGpioPinOutputLow050(*SlaveSelectPortPinArrayPointerArrayArray[spiChannelNumber][slaveSelectNumber]);
}

/*
void setupGpioPinOutputLow050(portPinArray portPinArray)
{
int portNumber;
int pinNumber;
GPIO_TypeDef *gpioStructPointer;

portNumber = getPortNumber(portPinArray);
gpioStructPointer = getGpioStructPointer(portNumber);
pinNumber = getPinNumber(portPinArray);

setupGpioPinOutput051(gpioStructPointer, pinNumber);
setGpioOutputPinLow051(gpioStructPointer, pinNumber);
  }
*/

/*
portPinArray PortPinArraySsel   = {PORT0, PIN2};
portPinArray PortPinArraySsel0  = {PORT0, PIN2};
portPinArray PortPinArraySsel1  = {PORT2, PIN0};
portPinArray PortPinArraySsel00 = {PORT0, PIN2};
portPinArray PortPinArraySsel01 = {PORT2, PIN0};
portPinArray PortPinArraySsel02 = {PORT2, PIN0};
portPinArray PortPinArraySsel10 = {PORT0, PIN2};
portPinArray PortPinArraySsel11 = {PORT2, PIN0};
portPinArray PortPinArraySsel12 = {PORT2, PIN0};

portPinArray SlaveSelectPortPinArrayPointerArray0[] = {&PortPinArraySsel00, &PortPinArraySsel01};
portPinArray SlaveSelectPortPinArrayPointerArray1[] = {&PortPinArraySsel00, &PortPinArraySsel01};

portPinArray SlaveSelectPortPinArrayPointerArrayArray[2][3] =
          {&PortPinArraySsel00, &PortPinArraySsel01, &PortPinArraySsel02, \
           &PortPinArraySsel10, &PortPinArraySsel11, &PortPinArraySsel12};
*/

// ***************************************************************************
// Function - SPI transmit
// Date     - 2013nov10
// ***************************************************************************
void spiTransmit060(uint8_t spiChannelNumber, uint8_t slaveSelectNumber, \
           SSP_DATA_SETUP_Type xferConfig)
{
/* OK
setGpioDataPinLow01(PortPinArraySsel00);

if (spiChannelNumber == 0)
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
else // (spiChannelNumber == 1)
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);

setGpioDataPinHigh01(PortPinArraySsel00);
*/

/* NOT OK !!!
portPinArray *slaveSelectPortPinArrayPointer;
slaveSelectPortPinArrayPointer = SlaveSelectPortPinArrayPointerArrayArray[spiChannelNumber][slaveSelectNumber];

setGpioDataPinLow01(slaveSelectPortPinArrayPointer);

if (spiChannelNumber == 0)
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
else // (spiChannelNumber == 1)
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);

setGpioDataPinHigh01(slaveSelectPortPinArrayPointer);
    */

// *** This is OK ***
setGpioDataPinLow01(*SlaveSelectPortPinArrayPointerArrayArray[spiChannelNumber][slaveSelectNumber]);

if (spiChannelNumber == 0)
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
else // (spiChannelNumber == 1)
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);

setGpioDataPinHigh01(*SlaveSelectPortPinArrayPointerArrayArray[spiChannelNumber][slaveSelectNumber]);
}

/*
void setGpioDataPinHigh01(portPinArray *portPinArrayPointer)
{
pinNumber pinNumber;
portNumber portNumber;
GPIO_TypeDef *gpioStructPointer;

pinNumber = getPinNumber(portPinArrayPointer);
portNumber = getPortNumber(portPinArrayPointer);
gpioStructPointer = getGpioStructPointer(portNumber);
setGpioDataPinHigh(gpioStructPointer, pinNumber);
}
*/

/*

portPinArray PortPinArraySsel   = {PORT0, PIN2};
portPinArray PortPinArraySsel0  = {PORT0, PIN2};
portPinArray PortPinArraySsel1  = {PORT2, PIN0};
portPinArray PortPinArraySsel00 = {PORT0, PIN2};
portPinArray PortPinArraySsel01 = {PORT2, PIN0};
portPinArray PortPinArraySsel02 = {PORT2, PIN0};
portPinArray PortPinArraySsel10 = {PORT0, PIN2};
portPinArray PortPinArraySsel11 = {PORT2, PIN0};
portPinArray PortPinArraySsel12 = {PORT2, PIN0};

portPinArray SlaveSelectPortPinArrayPointerArray0[] = {&PortPinArraySsel00, &PortPinArraySsel01};
portPinArray SlaveSelectPortPinArrayPointerArray1[] = {&PortPinArraySsel00, &PortPinArraySsel01};

portPinArray SlaveSelectPortPinArrayPointerArrayArray[2][3] =
          {&PortPinArraySsel00, &PortPinArraySsel01, &PortPinArraySsel02, \
           &PortPinArraySsel10, &PortPinArraySsel11, &PortPinArraySsel12};
*/

// .END


// *** version 050 ***********************************************************
// *** version 050 ***********************************************************
// *** version 050 ***********************************************************

void setupSpi051(int spiChannelNumber)
{
if (spiChannelNumber == 0)
{
// Enable SSP0 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP0, ENABLE);

// Reset SSP0 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP0, DISABLE);
SYSCON_SetSPI0ClockDiv(10);

// Assign GPIO pins for SPI
SSP_SSP0PinsInit(SCK0_PIO0_6, DISABLE); // Select P06, disable

// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP0, &SSP_ConfigStruct);

// Enable SSP peripheral
SSP_Cmd(LPC_SSP0, ENABLE);

// Setup Ssel0
setupGpioPinOutputLow050(PortPinArraySsel0);
}
else // (if spiChannelNumber == 1)
{
// Enable SSP1 block clock
SYSCON_AHBPeriphClockCmd(SYSCON_AHBPeriph_SSP1, ENABLE);

// Reset SSP1 and clock divider
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, ENABLE);
SYSCON_PeriphResetCmd(SYSCON_RSTPeriph_SSP1, DISABLE);
SYSCON_SetSPI1ClockDiv(10);

// No need to assign GPIO pins for SPI1, just disable
SSP_SSP1PinsInit(DISABLE); // disable SSEL

// IOCON_SetPinFunc(IOCON_PIO2_2, PIO2_2_FUN_MISO1);
// IOCON_SetPinFunc(IOCON_PIO2_3, PIO2_3_FUN_PIO_MOSI1);
// IOCON_SetPinFunc(IOCON_PIO2_1, PIO2_1_FUN_SCK1);
// if(useSSEL == ENABLE) {
        //    IOCON_SetPinFunc(IOCON_PIO2_0, PIO2_0_FUN_SSEL1);

// Initialize SSP with default configuration (Master mode, 8 bit data)
SSP_CFG_Type SSP_ConfigStruct;
SSP_ConfigStructInit(&SSP_ConfigStruct);
SSP_Init(LPC_SSP1, &SSP_ConfigStruct);

// Enable SSP1 peripheral
SSP_Cmd(LPC_SSP1, ENABLE);

// Setup Ssel1
setupGpioPinOutputLow050(PortPinArraySsel1);
}
}

void setupXferConfig(SSP_DATA_SETUP_Type *xferConfigPointer, uint8_t digitControlRegisterBuffer[], \
            uint8_t dummyReceiveBuffer[], uint8_t bufferSize)
{
    xferConfigPointer->tx_data = digitControlRegisterBuffer;
    xferConfigPointer->rx_data = dummyReceiveBuffer;
    xferConfigPointer->length = bufferSize;
 }

void SpiWriteRead050(SSP_DATA_SETUP_Type xferConfig, int spiChannelNumber)
{
if (spiChannelNumber == 0)
{
setGpioDataPinLow01(PortPinArraySsel0);
SSP_ReadWrite(LPC_SSP0, &xferConfig, SSP_TRANSFER_POLLING);
setGpioDataPinHigh01(PortPinArraySsel0);
}
else // (spiChannelNumber == 1)
{
setGpioDataPinLow01(PortPinArraySsel1);
SSP_ReadWrite(LPC_SSP1, &xferConfig, SSP_TRANSFER_POLLING);
setGpioDataPinHigh01(PortPinArraySsel1);
}
}

#endif /* SPI_HEADER_SEEN */

// ***********************************************************************
// End
// ***********************************************************************




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